Testing the line stage

Introduction

I couldn’t resist the temptation to try and build quickly the SLCF design proposed here.  It was question of building a simple PCB for the tail CCS and the top MOSFET follower. Wiring it then point-to-point could be done in a matter of minutes and a “rat nest” was built fast enough to enjoy this learning experience.

The usual challenges we face when breadboarding circuits

One of the challenges we face when building a cathode follower with a high-gain / transconductance valve is that it can easily oscillate widely into VHF. So we then are a bit more precocious when building the test jig and “try” to have short connections (something which I didn’t do), add some ferrite beads to anode, grid and screen. Also some grid/screen stopper resistors (e.g. 300Ω) are always very useful. If you pay attention to this and check with an oscilloscope with sufficient bandwidth (e.g. 200MHz) you can spot out any nasty oscillation from the valve. I didn’t, thanks to the ferrite beads and stoppers.

The clear challenge of the SLCF is establishing the correct bias point on the top follower due to the high value of the resistor divider and the high-variance we typically get on the VGS(th) of the MOSFETs.

High-value resistors are available on 1% but the variance on the FET defeat the purpose of accurately building the resistor divider.

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