Gyrator PCB Hack: final Enhancement Mosfet design

I evolved my previous design here, thanks to the help of Rod Coleman and fruitful discussions with him.

There is an option to improve the design by bootstrapping the top MOSFET to avoid using a bias Zener and allow the bottom device to have a constant VDS. This can be achieved by double bootstrapping the FETs. Here it goes:

Similar design as before. Only difference is that R7 is used to create the bias of T3, and thanks to the bootstrap of C2, the bottom FET (T4) now operates freely regardless the swing. D1 is needed to protect T4. R7need to be adjusted considering the output voltage expected as well as the maximum VDS before D1 starts to conduct.

There is an stability challenge and it can be addressed as Rod Coleman clearly points it out, a “guard ring” :

The other pro trick is the guard ring: this will dramatically reduce problems of dc-drift, if the PCB surface gets contaminated, e.g. when soldered with some old or poor-quality solder. Or damp air, fumes etc. It’s a conductor (pcb trace) around the high-impedance network formed by the 10M resistors. A staggered-pinout version of the TO220 is needed to implement it, as the TO220 is the hotspot for leakage (B+ of drain to the 10MΩ-driven gate!).

If there is a leakage path, it leads only to the guard ring, which is only a few volts away from the intended bias – rather than if the leakage can reach ground or B+, which would drive the circuit crazy. Connect the guard to a low-Z source – the Output in this case.
 
Anyway – I hope it is useful in some way!
(Rod Coleman)
 
How well it performs? Here you can see – no guard ring here, just adapted standard PCB for testing purposes:
Not bad at all with 3MHz bandwidth. However, considering the circuit complexity, I much rather stick to the depletion version which performs much better in my view:
 
Nearly 5.7MHz under same conditions!
 
Cheers, Ale
 

Author: Ale Moglia

"A mistake is always forgivable, rarely excusable and always unacceptable. " (Robert Fripp)

2 thoughts on “Gyrator PCB Hack: final Enhancement Mosfet design”

  1. Great work Ale; really interesting.
    Why do you think the depletion version has improved bandwidth?
    In my source follower version I used drain and source “stoppers” to try to help stability. I even played with Miller Compensation (drain to gate) but as usual I was only testing by ear.
    Next thing is you might like to try is to use the tube as a pentode rather than triode strapped. Gain out the wazoo but then allows lotsa feedback (current as well as voltage) if ya that way inclined. Current feedback seems to have merit.
    best
    tim

  2. Hi Tim, thank you. It has been rather interesting to explore and experiment with different gyrator variances. I have a pile of hacked PCBs! Probably 8 to 10 gyrator boards lying around.

    I’m not sure about the HF difference. Probably the double bootstrapping is loading the gate of the top FET more than with the depletion. You get any parasitic capacitance (in the region of +200pF with the cables) which is shorting the path to ground. Either way the performance is jolly good. However, the depletion is simpler and does sound really good!

    This is a cascoded arrangement which behaves differently from a simple follower.

    Regarding the pentodes, I’m building a new rig including a modified gyrator PCB used as screen regulator. I also conducted several tests using pentodes. Probably you remember the ones which included a pentode driver and anode to gate (a la Schade) feedback.

    What other feedback arrangement did you have in mind?
    Thanks
    Ale

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